Power-Aware Register Assignment for Multi-Banked Register Files

The multi-banked register file (MBRF) is an effective approach to reduce the complexity for a monolithic register file. In order to apply the multi-banked register file to a low-power microprocessor, we have to design a dynamic voltage scaling (DVS) approach for the MBRF to reduce its power consumption. However, when the temporary values are stored into an MBRF, their distributed storage locations will make us difficultly identifying when a register bank should be powered up or powered down. To resolve this problem, in this paper, we analyze the accessed frequencies of the temporary-values in a program and cluster them into register banks by their frequencies through register assignment. The major goal is to make those infrequently accessed register banks have more opportunities to stay in the idle mode. Through a proposed DVS circuit, we can then supply these infrequently-accessed register banks a low voltage to save the static power. Simulation results show that, for a four-banked register file, on average, our approach reduces about 60% energy consumption while performance loss can be limited to less than 17%, compared to an MBRF without DVS.